1. Field of the Invention
The present invention relates to an active matrix display device, and more particularly to an active matrix display device employing a switching device such as a thin film transistor (hereinafter called "TFT"), and using liquid crystal for a display medium.
2. Description of the Prior Art
Recently, research on active matrix display devices using liquid crystals for a display medium is keenly in progress, among which special attention is focused on the development of liquid crystal display devices (hereinafter called "LCD") so as to find applications in planar display devices. Such research is producing successful models. At present the research on active matrix LCDs are divided into at least two types depending upon the objects: one is to achieve a large display screen usable for a wall-hung TV display, and the other is to achieve a high-precision display screen. A high-precision, small-size display screen is particularly in strong demand so as to achieve a color view finder for video cameras.
The active matrix LCD is provided with IC chips for driving a TFT array. In high-precision, small-size active matrix LCDs the terminals are provided at such small distances so as to make it difficult to mount IC chips thereon. To overcome this difficulty, a TFT array is formed on the substrate for constituting a driving circuit.
Referring to FIG. 4, a basic structure of an active matrix display device using a driving circuit and a TFT array both formed on the same substrate will be described. On a substrate 50 are disposed a gate driving circuit 54, a source driving circuit 55, and a TFT array section 53 in which multiple gate buses 51 in parallel extend from the gate driving circuit 54. Multiple source buses 52 from the source driving circuit 55 cross the gate buses 51 at right angles. In parallel with the source bus 52, an additional capacitor common line 59 is disposed.
A rectangular region enclosed by the source buses 52, the gate buses 51 and the additional capacitor common line 59 includes the TFT 56, pixels 57 and additional capacitors 58. The gate electrode of the TFT 56 is connected to the gate bus 51, and the source electrode is connected to the source bus 52. Liquid crystal is confined in between the pixel electrode connected to the drain electrode of the TFT 56 and the counter electrode on the substrate so as to constitute pixels 57. An additional capacitor 58 is disposed between the TFT 56 and the additional capacitor common line 59. The additional capacitor common line 59 is connected to an electrode having the same potential as that of the counter electrode.
In this type of display the gate driving circuit 54 generates a signal in response to which the TFT 56 connected to the gate bus 51 is turned on. The source driving circuit 55 sends an image signal to the pixels 57 through the source bus 52. After the TFT 56 is off, the image signal is retained between the pixel electrodes and the counter electrode. Since a high-precision, small-size active matrix LCD has pixels having a reduced area, the capacitance between the pixel electrodes and the counter electrodes becomes small. As a result, the image signal cannot be retained for a required period of time. In addition, the potential of the bus varies in large amplitude, thereby failing to match with the potential of the pixel electrode. To make up for the insufficient capacitance, the additional capacitors 58 are provided in parallel with the pixels 57. One of the terminals of each capacitor 58 is connected to the drain electrode of the TFT 56, and the other terminal is connected to an electrode having the same potential as that of the counter electrode through the additional capacitor common line 59 so as to equalize the potentials between the other terminal of the TFT 56 and the counter electrode.
The active matrix display devices incorporating the driving circuit as a unit uses polysilicon for a semiconductor layer of the TFT because of the high degree of mobility of electrons and holes, and of the possibility of fabricating n-type TFTs and p-type TFTs, thereby making it possible to constitute a CMOS construction.
This type of active matrix display device is disadvantageous in that the provision of additional capacitors reduces the effective area for the pixel electrodes, thereby lowering the numerical aperture of the display panel as a whole. In order to solve the problem of the reduced numerical aperture, and avoid the occurrence of delayed signals, Japanese Laid-Open Patent Publication No. 1-304402 proposes an active matrix display device, which includes an additional capacitor common line.
Referring to FIGS. 5 and 6, this known display device will be described to explain the background of the present invention:
A polysilicon layer is formed on a glass substrate 11 by a known method such as a CVD method and a sputtering method. The resulting polysilicone layer is patterned so as to form a semiconductor layer 12 and a lower capacitor electrode 5. Then a gate insulating layer 13 is formed by a CVD method or by thermally oxidizing the surface of the polysilicon layer. The lower capacitor electrode 5 is subjected to doping by an ion implantation method so as to make it a low resistance capacitor electrode.
The gate bus 1, the gate electrodes 3a and 3b, and upper capacitor electrode 6 are formed with n-type or p-type polysilicon. The additional capacitor 27 is formed between the upper capacitor electrode 6 and the lower capacitor electrode 5. Under the mask of the gate electrodes 3a and 3b, and a resist formed by photolithography, lower parts below the gate electrodes 3a and 3b of the semiconductor layer 12 are subjected to ion implantation. In this way the source and drain region of the TFT is formed as a self-alignment structure.
An insulating layer 14 is formed on the whole surface of the substrate 11.
Referring now to FIG. 5, three contact holes 7a, 7b and 7c are formed. The contact holes 7a and 7b extend through the insulating layer 14 and the gate insulating layer 13, and are open on the semiconductor layer 12 and the lower capacitor electrode 5.
Next, the source bus 2 and the additional capacitor common line 8 are simultaneously formed with a low-resistance metal such as aluminum. As shown in FIG. 5, the source bus 2 is formed such that it expands on the contact hole 7a, and the additional capacitor common line 8 is formed such that it expands on the contact hole 7c. The source bus 2 is connected to the semiconductor layer 12 through the contact hole 7a, and the additional capacitor common line 8 is connected to the upper capacitor electrode 6 through the contact hole 7c. The additional capacitor common line 8 is connected to an electrode having the same potential as that of the counter electrode on the counter substrate.
FIG. 5 further illustrates that a pixel electrode 4 of Indium Tin Oxide (ITO) is patterned. Part of the pixel electrode 4 extends through the contact hole 7b, thereby connecting the pixel electrode 4 to the semiconductor layer 12 through the contact hole 7b. The whole surface of the substrate 11 is covered with a protective layer 15.
The additional capacitor 27 has a thin gate insulating layer 13 between the upper capacitor electrode 6 and the lower capacitor electrode 5, thereby increasing the capacitance of the additional capacitor 27 per unit area. Thus, the area occupied by the additional capacitor 27 is advantageously minimized, thereby preventing the numerical aperture of the display panel from being reduced.
In order to enhance the high-precision display, it is necessary to minimize the size of the pixel electrodes. However, if the size of the pixel electrodes is reduced beyond a particular limit, the spacing of the gate bus 1 and the source bus 2, the size of the TFT 25a and 25b cannot be shortened any more. As a result, the numerical aperture of the display panel becomes low, thereby resulting in a dark image picture.
The brightness of the image picture on the display screen is not always proportional to the area of the pixel electrodes 4. The liquid crystal layer positioning on the pixel electrodes 4 unavoidably has an electric field whose intensity depends upon the degree of display, and the molecules therein are orientated by the electric field, but the liquid crystal positioning off the pixel electrodes 4 has no electric field, so that the molecules are in disorder. In the twisted nematic mode that is currently in most common use, the normal-white system is used because it is least liable to birefringent when an image picture is represented white. Under the normal-white system the "white" representation occurs in other area having no electric field than the pixel electrodes 4. As a result, the contrast ratio decreases. In order to prevent reduction in the contrast ratio, a light shield layer is formed in other areas than the parts on the counter substrate corresponding to the pixel electrodes. The light shield layer is in principle effective to prevent the contrast ratio from decreasing but the actuality is that the numerical aperture of the display panel is nevertheless reduced because of the overlapping of the edges of the light shield layer and the peripheral edge of the pixel electrode.
It will be understood from the foregoing description that the known high-precision, small-size active matrix display device reduces the display performance because of the low numerical aperture. When a display device having a large area covered by the light shield layer is used for a projection type display device, another problem arises as black spots in the image picture resulting from the light shield layers.